Check circuitry and apparatus



April 4, 1967 R. E. BELL ETAL CHECK CIRCUITRY AND APPARATUS lOSheets-Sheet l Original Filed March 1G, 1960 INVENTORS ROBERT E. BELL ByRICHARD C. LOSHBOUGH .Num .MII

ATTORNEYS m 4, w67 R. E, BELL, ETAL CHECK CIRCUITRY AND APPARATUS lOSheets-Sheet 2 Original Filed March 16. 1960 INVENTORS ROBERT E. BELL BYRICHARD C, LOSHBOUGH www fwd/zy f ATTORNEYS Amin 4, w67

R. E. BELL ETAL 3,3l2,939

CHECK CIRCUITRY AND APPARATUS Original Filed March 16, 1960 lOSheetS-Sheet 5 omobomb NN--ro YY'`: q/l

O 5 Il INVENTORS ROBERT E. BELL BY RICHARD C. LOSHBDUGH @MMZa/LufavATTORNEYS R. E. BELL ETAL 993i CHECK CIRCUITRY AND APPARATUS OriginalFiled March 1S, 1960 lO Sheets-Sheet 4,

ROBERT E. BELL RICHARD (L LOSHBOUGH ATTORNEYS CHECK CIRCUITRY ANDAPPARATUS original Filed March la, 19s@ lo sheetsheet s l INPUT FROMCONVERTER CONVERTER 2B@ SW 5 1- LATCH LATCH RIEB SOLENOD SOLENOID C ElINPUT |NpUT @fh FROM FROM l CONVERTER CONVERTER i CRB E 9..... INVENTORSROBERT E, BELL BY RTCHARD C. LOSHBOUGH y@ ATTORNEYS? l0 Sheets-Sheet 6R. E. BELL ETAL CHECK CIRCUITRY AND APPARATUS Apri 4, 1967 OriginalFiled March 16 BYRICHARD C. LOSHBOUGH ATTORNE S WH 4, w67 R. E, BELLETAL CHECK CIRCUITRY AND APPARATUS lO Sheets-Sheet '7 Original FiledMarch 16. 1960 INVENTORS ROBERT E. BELL BY RiCHARD C. LOSHBOUGH ATTORNESWII 96? R. E. BELL ETAL CHECK CIRCUITRY AND APPARATUS Original FiledMarch 16. 1960 lO SheeJs-Sheet 8 IIIIIIIIIIIIIIII mm ...m @miIIIIIIIIIIII I I I I I I I I II I IIIIIIIIIIIIIIII W @m H m ,H l

IIIII IIIII IIIIIIIIIIIIIIIII L L?) m I` T53 INVENTORS 'III I I ROBERTE. BELL BY RICHARD C. LOSIIBOUGH ""I' I I.: ATTORNEY April 4, 196'? R.E. BELL ETAL CHECK CIRCUITRY AND APPARATUS lO Sheets-Sheet 9 OriginalFiled March 16. 1960 INVENTORS ROBERT E. BELL BYRICHARD C. LOSHBOUGHATTORNEY lO Sheets-$heet lO Amd 4, i967 R. E. BELL, ETAL CHECK CIRCUITRYAND APPARATUS Original Filed March 16, 1960 United States Patent iiice3,312,939 Patented Apr. 4, 1967 CHECK CIRCUITRY AND APPARATUS Robert E.Beil and Richard C. Loshhough, Toledo, Ohio, assignors to Toledo ScaleCorporation, Toledo, Ohio,

a corporation of @hic Continuation of application Ser. No. 15,499, Mar.16,

1960. This application June 1, 1965, Ser. No. 466,140 7 Claims. (Cl.340-147) This invention relates to check circuitry and apparatus and inparticular to check circuitry and apparatus utilizing electronic digitaland pulse logic circuits.

This application is a continuation of abandoned application Serial No.15,499 led March 16, 1960 in the names of Robert E. Bell and Richard C.Loshbough which in turn is a continuation-impart of abandonedapplication Serial No. 818,858 filed June 8, 1959 in the names of RobertE. Bell and Richard C. Loshbough.

In the expanding field of electronic control many of the manual andmental manipulations and computations previously performed by anoperator are now accomplished through the use of digital and pulse logiccircuits and computers. In using a computer, however, information mustbe initially programmed in a form which may be utilized by the computerbefore the computations can be made. After the computations are made theiinished computations are generally not in a form directly usable by thehuman operators. Therefore, a field has arisen which covers an area ofapparatus generally designated as readout devices. These readout devicesmay receive the information from the computer and convert it intoindicia that is easily read visually or is read by a printing mechanismwhich transfers the indicia of the readout device to a card, tape,label, or any of a number of other well known forms for recording outputinformation from a readout device.

Although output information from computers is generally in a binary codeit is possible on smaller computers or computing machines to have adirect decimal output fed to the readout device, e.g., in an addingmachine. In most applications, however, computation within the computeris effected by the use of the binary number system and thus a binary todecimal converter is necessary as a conversion step between the computerand the readout device.

Quite often computers are used directly with some form of a conditionresponsive device. The condition responsive devices usually generate aseries of electrical pulses proportional in number to a condition beingmeasured. It is with this type of computer application that the presentinvention is employed. Since the condition responsive device isconnected directly to the computer there is no human intermediary whoinsures that the computer is receiving the information. There is againno human intermediary to insure that the output information from thecomputer to the readout device has properly positioned the readoutdevice, if it is electro-mechanical, or has energized the proper controlcircuits, if it is an electronic readout device which employs light orother visual indicating Imeans commercially available. It is thereforedesirable to have a circuit which checks that the computer is receivinginformation and that checks to see if the readout device is properlyrecording output information from the computer and to have apparatuswhich mechanically checks to see if the readout device is functioningproperly.

It is, accordingly, `an object of this invention to provide checkcircuitry and apparatus.

A further object of the invention is to provide an improved checkcircuit.

p Another object of the invention is to provide a check circuit, whichinsures that at least one pulse has passed or value.

from a condition responsive device through an entire computer chain andthat all of the control circuits or mechanical positions of a readoutdevice are properly energized or mechanically in place before a readoutsequence or a print cycle is initiated, in combination with apparatuswhich mechanically checks to see if the readout device is functioningproperly.

In the specific embodiment of the present invention there is shown acondition responsive device which might be a weight sensing device incombination with a scanner projection lamp, a fixed graduated orcalibrated transparent member, an opaque mask covering said transparentmember and movable in response to a Weight on said weight sensing deviceand a photo-electric cell, which generates a series of electrical pulsesproportional in number to a weight being measured. The generated pulsesmay then be fed through a preamp and a pulse shaping circuit to amultiplier of the computer. If the weight being measured were that of amarketable-` product, such as in a food store where the product has acertain price per pound, then this price per pound could be previouslyset up in the multiplier to give the value of the food product beingweighed. The computer in this case could compute or count the weight ofthe product and also compute or count the value of the product. Afterthe computations are finished it would be desirable to show thecomputations arrived at for both the weight and value in a visual form,but, particularly in the case of food products, it would be even moredesirable to print the weight and the value, as computed, on a labelwhich can be placed in or on the packaged food product. If a printingcycle were to be initiated on the completion of a registration ofindicia in the readout device it would also be desirable that thetransfer of the information from the computer to the readout device bechecked, that at least one of the pulses that had been carried throughthe multiplier from the condition responsive device had been checked asarriving and that the readout device be checked mechanically to see ifit is functioning properly.

Accordingly, a feature of the check circuitry and apparatus of thisinvention isto check the above operations and prevent initiation of aprinting cycle upon the failure of a scanner projection lamp, anyelectronic device from the preamp to the last multiplier stage, or alockup of the weight sensing device that would eliminate the signal,and, with no protection, print a label with no computed weight When anelectro-mechanical readout device, such as will be describedhereinafter, is used the check circuitry and apparatus also preventsinitiation of a printing cycle upon failure of a Wheel or an indiciabearing rotary drum member to position on a number or indiciacorresponding to the state of the controlling decade counter, thefailure of said wheel member to properly lockup or the fai-lure of saidWheel member to stop rotating which might be caused by an electronicdevice failure, broken lead or other cause.

Although a readout device embodying strictly electronic circuitry whichpresents the readout information in lighted numerals or positioned lampsis not shown in this application or other forms of binary to decimalconverters are not shown specifically, such as a diode or resistancematrix, it is to be understood that the principles and scope of thepresent invention are meant to include other forms of the aforementioneddevices although they are illustrated only in block diagram form.

According to the invention, the check circuit comprises a conditionresponsive device adapted to generate a series of electrical pulsesproportional in number to a condition being measured. At least one pulseof this series is applied to a Bistable circuit. The entire series ofpulses is applied to an electronic counter means. and may be applied tosaid counter means through a multiplier device. A readout means isutilized which is operative to register predetermined indicia inresponse to a predetermined count of the pulses in the counter means. Inresponse to the coincidence of a predetermined registered indicia ofsaid readout means and an associated predetermined count in said countermeans an initiating circuit means initiates a signal. This initiatedsignal is applied to an AND logic circuit. There are as many inputs tothe AND logic circuit as there are indicia to be registered in a properposition 'by the readout device. When all of the indicia are properlyregistered and positioned with respect to the count in their associatedcounter means the AND logic circuit will produce an output signal. Whenthe first pulse of said series of pulses is supplied to the Bistable orMEMORY circuit, the Bistable circuit is turned ON and produces an outputsignal. The outputs of the Bistable or MEMORY circuit and the AND logiccircuit are connected to an output circuit means which produces anoperative output signal condition in response to the coincidence of anoutput signal from said AND logic circuit and an output signal from saidBistable or MEMORY CIRCUIT. The check apparatus comprises a sensingmember which mechanically checks to see whether or not the readout meansis functioning properly and operates every time that such operativeoutput signal condition is produced.

In one embodiment of the invention the output circuit means comprisesfirst and second NOT logic circuits respectively connected :to theoutputs of the Bistable circuit and the AND logic circuit. The output ofthe first and second NOT logic circuits are connected to maintain acheck relay normally energized. In a second embodiment of the teachingsof this invention the output means comprises first and second NOT logiccircuits which are respectively connected to the outputs of the Bistablecircuit and the AND logic circuit, and an output NOR logic circuithaving two inputs which are respectively connected to outputs of saidfirst and second NOT logic circuits. In a third embodiment of thisinvention the output circuit means comprises a second AND logic circuithaving two inputs and an output, with the outputs of the Bistablecircuit and the before mentioned AND circuit being respectivelyconnected to the two inputs of the second AND logic circuit. In a fourthembodiment the output circuit means comprises a NOT logic circuitconnected to the output of said AND logic circuit and a check relaybeing maintained normally energized through an OR logic circuit by theoutput of said NOT logic circuit and an OFF output of said Bistablecircuit. There must be a check or ta coincidence of output signalsverifying the proper set up of the apparatus which will allow the outputcircuit means to produce an operative output signal condition which willinitiate, after the sensing member has mechanically checked the readoutmeans, a cycle, a readout sequence, a printing cycle, or other desiredcycles successive to proper registration of the information on or in thereadout device.

Although the various logic circuits mentioned above are in common use inthe electronic control field, a brief description of the function ofeach circuit is as follows. An AND logic circuit produces an outputsignal when, and only when, all of a plurality of input signals arepresent. A NOT logic circuit produces an output signal at all timesunless an input signal is present. A NOR logic circuit produces anoutput signal only when neither a first, nor a second, nor a third, noran Nth input signal, of an N number of inputs are present. A MEMORYlogic circuit, sometimes known as a Fip Flop or Bistable circuit has ONand OFF or reset input terminals, and ON and OFF output terminals. TheMEMORY or Bistable circuit produces an ON output signal in response to asignal applied at the ON input terminal and continues to produce the ONoutput signal, even though the input signal at the ON input terminal isremoved,

until a signal is applied to the OFF input terminal. The MEMORY circuitwill then be turned OFF and produce an OFF output signal even though thesignal at the OFF input terminal is removed. The MEMORY circuit willrevert to its initial state upon application of a signal to the ON inputterminal. An OR logic circuit produces an output upon receiving an inputsignal at any of a plurality of input terminals. For further details onthe construction and operation of various types of logic circuitsreference is made to an article entitled Static Switching Devices, byRobert A. Mathias in Control Engineering, May 1957.

Preferred embodiments of the invention are illustrated in theaccompanying drawings.

In the drawings:

FIG. I is a block diagram of a first embodiment illustrating theteachings of this invention;

FIG. II is a block diagram of an alternate output circuit which may beutilized with the apparatus of FIG. I;

FIG. III is a block diagram of a third output circuit means which may beutilized with the apparatus of FIG. I;

FIG. IV is a block diagram of a fourth output circuit which may beutilized with the apparatus of FIG. I;

FIG. V is a front elevational view showing an assemlbled numericaldisplay or printing readout device comprising five indicia bearing drummembers, four of which are stopped in indicating position;

FIG. VI is an oblique view of one of duplicate assem blies comprisingthe readout device shown in FIG. V;

FIG. VII is a fragmentary side elevational view with parts broken awayshowing one of the indicia bearing drum members and a rockable supportmember together with a circuit controlling the indication of a count tothe readout device from the counter;

FIG. VIII is a diagram of brushes and a commutator, mounted in the drummember, that are used yin the circuit controlling the indication of acount;

FIG. IX is -a schematic diagram of a decade counter which may beutilized in this invention;

FIG. X is a schematic diagram of certain portions of the apparatus ofFIG. I;

FIG. XI is a vertical sectional view taken along the line XI--XI of FIG.XIII;

FIG. XII is a fragmentary end elevational view as seen from a positionto the left of the device shown in FIG. XIII;

FIG. XIII is a fragmentary front elevational view of amodified readoutdevice, parts being shown in section;

FIG. XIV is a fragmentary plan v-iew of the device shown in FIG. XIII,and

FIG. XV is a fragmentary front elevational view as seen from a positionto the left of the device shown in FIG. XI.

Referring now to FIG. I, there is shown a first embodiment of theteachings of the check circuit of this inven tion laid out in :blockdiagram. A condition responsive device 10, which may be a weight sensingdevice 1l and a scanner mechanism 12 is connected to feed a series ofelectrical pulses, which have been generated ,proportionai in number tothe condition being measured, to a multiplier 14. The multiplier 14 hastwo output connections the first of which goes through a gated amplifier16 to an ON input 21 of a Flip-Flop or MEMORY or Bistable circuit 20.The second output of the multiplier 14 is connected to the input of acounter or computer 34. The output of the computer 34 is connectedthrough a binary to decimal converter 36, to a readout device 38. Theoutput of the binary to decimal converter 36, if the converter 36 is amatrix or other strictly electronic device, may be connected to an input41 of an AND logic circuit 40. The output, or a sample of the output, ofthe readout device 38 is connected to a second input 42 of the AND logiccircuit 40. If binary to decimal converter 36 is of theelectro-mechanical type a feedback from the output of the readout device38 may be connected back to the binary to decimal converter 36 in orderto activate a latch circuit of the converter 36 which will bring thebinary to decimal converter 36 and the readout device 38 to stop onindicia corresponding to a count in the counter 34. The output of theAND logic circuit 40 is connected to an input 55 of the AND logiccircuit 50. The AND logic circuit Si) has as many inputs 51-54 and 55-58as there are previous readout circuits, for example, one readout circuitfor each place in the number to be indicated.

The output of the AND logic circuit 5t) is connected to the input of aNOT logic circuit 6i) of an output circuit means designated generally at26. The ON output of the Flip Flop 2t) is connected to a NOT logiccircuit 24 of the output circuit means 26. The outputs of the NOT logiccircuits 24 and 60 are connected respectively to the inputs 29 and 3d ofan OR logic circuit 28. The output of the OR logic circuit 28 isconnected to energize a check relay 32.

If the condition responsive device 10 is comprised of a weight sensingdevice 11 and a scanner 12, the placing of a material to be weighed onthe device 11 will cause the scanner 12 to produce or generate a seriesof electrical pulses proportional in number to the weight beingmeasured. There are `a number of scanning devices, that would besuit-able for generating the pulses as desired, known to those skilledin the art. An example of such a scan ner that may be advantageouslyused with this invention is described in a copending U.S. patentapplication entitled Indication Scanning Device, Serial No. 553,457,tiled Dec. 16, 1955, and assigned to the same assignee as the presentinvention and which has issued as U.S. Patent No. 2,938,126 on May 2-4,1960. In brief, the scanner described in the above-referencedapplication comprises a condition responsive member which may be aweight sensing device, a stationary graduated opaque chart havingtransparent graduations, a photoelectric cell, an optical projectionsystem having a lens that is movable along the chart and that is adaptedto sweep projected images of chart graduations across the photoelectriccell, and a mask operatively connected to the condition responsivemember and adapted to interrupt the projection of images from a chart tothe photoelectric cell during a portion of the movement of the lensaccording to the position of the condition responsive member. Thegraduated chart in the path of the projection lens is xed relative tothe path to prevent relative vibration between the chart and the vpathand to provide easy means for focusing images of the chart on thephotoelectric cell. Preventing relative vibration between the chart andthe path of the projection lens adds to the accuracy of the indicatorscanning device, since such relative vibration causes variations infrequency of the pulses of the wave trains and, if severe, may causeretrograde movement and consequently multiple scanning of somegraduations. The provision of easy means for focusing images of thechart on the photoelectric cell also provides a system requiring aminimum of adjustments that must be carried out to maintain the focusedcondition.

Although not shown on the block diagram of FIG. I various preamps orpulse shapers may be utilized between the output of the scanner 12 andthe multiplier 14 in order to obtain the desired amplitude and shape ofpulses.

The multiplier 14 as shown in FIG. I is a necessary item only when thecondition, such as the Weight of the material, needs to be multiplied byanother variable or by a constant, such as the price of the material perunit weight. If the multiplication by a predetermined figure is notdesired the output of the scanner 12 could be connected directly to thecounter 34 and also directly through the gated amplifier 16 to the ONinput of the Flip Flop 20.

It may be seen that at least one and probably the rst pulse of theseries of pulses generated from the scanner 12 will pass through theentire previous chain of a preamp, a pulse Shaper, a multiplier, and thegated amplilier b to provide an ON input signal to the Flip Flop 20. TheFlip Flop 20 was previously in the OFF condition in response to an OFFinput signal applied at the reset or OFF terminal 22, as will beexplained hereinafter.

The entire series of pulses from the scanner 12 will be counted by thecounter 34 or will be computed by the combination of the multiplier 14and the counter 34. The resultant count in the counter 34 may be fedthrough a binary to decimal converter 36 to the readout device 38. Ifthe output of the counter 34 is in the binary code the converter 36 mustbe utilized if the readout indicia is to be registered in the decimalsystem. By far the majority of the computers and counters are set up tobe programmed under the binary coded system. The binary to decimalconverter 36 may be any of several types known to those skilled in theart. Examples of static electronic converters are the resistor and diodematrices. In the embodiment shown in this invention, anelectromechanical binary to decimal converter is utilized.

The readout device 3S may be any of several types known to those skilledin the art, suoh as the electric typewriter programmed from the binaryto decimal converter, a plurality of lamps which indicate by theirrelative positive positions the number of indicia to be readout, orlamps or tubes which each have a plurality of electrodes shaped in theforms of the indicia to be.` read out, each of said electrodes beingignited or caused to glow in response to a selected signal from thebinary to decimal converter 36. The readout device 38 may also be of themechanical type as shown and described hereinafter.

It is desired to sense a coincidence of a predetermined indicia shown bythe readout device 38 as corresponding to a predetermined count in thecounter 34 which is fed through the converter 36. This is acomplished inFIG. l by sampling the outputs of the binary to decimal converter 36 andelctrically sensing the mechanical position or sensing the particularcontrol circuit which is energized of the readout device 38. When tfhesetwo outputs are present and applied to the inputs 41 and 42 of the ANDlogic circuit 4t), the AND logic circuit 4t) will produce an output tothe input 55 of the AND logic circuit 50. When using anelectro-mechanical binary to decimal converter 36, as shown hereinafter,the use of an output signal from the readout device to the converter ora signal from the output of the converter itself may be utilized toactivate latching circuits which will properly mechanically position thebinary to decimal converter 36 and thus properly mechanically positionthe readout device 38.

If there are a plurality of readout devices such as the one justdescribed it may be seen that the plurality of output signals from therespective circuits must be applied to a like plurality of inputs of theAND logic circuit St) in order to cause the AND logic circuit 5@ toproduce an output signal. Assuming that there are no failures in theelectronic portion of the apparatus and the proper positioning of thereadout device 38 there is an ON output from the Flip Flop or Bistablecircuit 20 and also an output from the AND logic circuit 5t). Inresponse to the coincidence of an output signal from the AND logiccircuit Sil and an output signal from the Bistable circuit 2li theoutput circuit means 26 produces an operative output signal con-ditionwhich may be utilized, as hereinbefore discussed to initiate a readoutsequence, a print cycle, or a next succeeding desired sequence or cycle.

The output circuit means 26 shown in FIG. I operates in the followingmanner. The check relay 32 is maintained in an energized state by theoutput signals of the NOT logic circuits 24 and 6i) through the OR logiccircuit 28. According to the definition of the NOT logic circuit above,if either of the NOT logic circuits 24 or 60 stops producing an outputsignal in response to an input signal, then the other of the NOT' logiccircuits 24 or 60 will still be producing an output signal which willmaintain the check relay 32 energized. Therefore, when the NOT logicelements 24 and 6i) are receiving input signals from the Flip Flop orBistable circuit 2@ and the AND logic circuit 5G coincidentally then theenergization will be removed from the check relay 32 and it will dropout. The drop out of the check relay 32 may be utilized in any of themany obvious ways through either a set of back or front contacts toinitiate the operation of a succeeding sequence or cycle.

Referring to FIG. II there is shown an alternate ernbodiment of theoutput circuit means 2o in which the NOT logic circuits 24 land 6d havetheir outputs connected to a pair of inputs 53 and ed of the NOR logiccircuit 62. As described above a NOR logic circuit produces an outputonly when neither a first nor a second of the two inputs is present.Therefore, the coincidence of the output signals from the Flip Flop 2tland the AND circuit 56B will allow the output NOR logic circuit 62 toprovide an output to initiate the operation of the succeeding cycle. Itis to be realized that the outputs of the two NOT logic circuits 24 and6@ may be utilized separately or in other combinations to produce theoperative output signal condition which is desired. In FIG. III theoutput circuit means 25 is shown as consisting only of the AND logiccircuit 66 having a pair of inputs 67 Yand 68 respectively connected tothe outputs of the Flip Flop 20 and the AND logic circuit 50. Again asin FIG. Ii the output circuit means 26 will then provide an output inresponse to the coincidence of output signals from the Flip Flop orBistable circuit 20 and the AND logic circuit 50. In FIG. IV the checkrelay 32 is maintained normally energized by the OFF output of theBistable circuit 20 and the output of the NOT logic circuit 66 throughthe OR logic circuit 28, again furnishing the desired operative outputsignal condition,

Referring now to FIGS. V through VIII, there is shown particularembodiments of the binary to decimal converter 36 and the readout device38. This electro-mechanical combination may be constructed on a framehaving vertically upstanding end plates 201 and 2tl2. A complete devicecomprises a plurality of duplicate subassemblies, one for each place inthe readout indicia or number to be indicated. The subassemblies, one ofwhich is shown in FIG. VI, are driven mechanically by a series of spacedapart power wheels 263 mounted on a power shaft 204 journaled onbearings adjustably mounted, but not shown, in the end plates 2tl1 and2x22. The power wheels 203 are continuously rotated when the device isin operation and, when engaged, frictionally drive a plurality ofintermediate drive wheels or idlers 205 each of which positively engagesand rotates one of a plurality of generally cup-shaped hollow drummembers 206 bearing indicia on their cylindrical surfaces. If a visualreadout is desired the indicia may be in the form of numbers, forexample, which would then be visible through the windows 267 in a frontwall 208 of a housing enclosing the device. For the purposes ofprinting, the indicia on the drum 206 .may be of the raised type whichwhen wiped with an ink roller and pressed on a readout card or labelprints the indica which is registered on the readout device. The readoutdevice may be adapted to produce both the visual and printing readoutoperations by the connection of the readout drums and printing drumsthrough, for example, gearing means.

The drum member 2% is mounted for rotation on a needle bearing locatedaxially, by means of a snap ring, (neither shown) on an axle 21dextending between the end plates 2M and 202. A flanged bearing held by asecond snap ring (neither shown) on the axle 211 holds the needlebearing in place against the inner surface of the first snap ring. Theidler 265 is fitted with bushings turning on an axle (neither shown)fixed to an arm of a support member 2id fixedly mounted on the fiangedbearing. Thus, the rockable support member 216 and t the drum member 266have a common pivotal axis des fined by the axle 2M.

The idler 265 includes, to cooperate with the power wheel 263, afriction drive surface 217, which may be knurled, flanked by a gear 2idon one side and tive equally spaced apart teeth 2d? on the other side.When the readout device is in operation so that the power wheels 2a23are constantly rotated and when the support member 216 is rocked toengage the drive surface 217 of the idler 265 with its power wheel 203,the power wheel 223 continuously rotates its associated idler 265. Therotating idler 2:25 drives the drum member 2% at half its speed, thegear 213 on the idler 205 being engaged with a gear 226 mounted on theside of the cup-shaped hollow drum member 2655. A second gear on theside of the drum member 2M could be used to drive a train of .gears toset type wheels according to the indicia displayed through the windows207. The directions of rotation of the power wheels 2%3, of the idlers265, and of the drum members 2%6 are indicated yby arrows in FIG. VI.

When the turning drum 20d lapproaches the position at which it is tostop, va signal is transmitted through a circuit controlling theindication of the count, which binary to decimal converter circuit willbe hereinafter described, to cause an end 222 of a solenoid operatedlatch 223, one of which is provided for each idler 205, to intercept theapproaching of the five teeth 29 on the side of the idler 295 at aposition adjacent the associated power wheel 203 thereby stopping thatone of the drum members 295 at one of ten possible stopping positions.The latch 223 is fulcrumed on a bracket 224 by means of a fiexure .platereturn spring 225, the bracket 224 extending between the end plates 261and 202. The latch 223 is actuated by a solenoid 226 fixed to thebracket 224, the solenoid 226 Vbeing energized to actuate the latch bythe signal through the circuit controlling the indication of a count.Ten possible stopping positions .are provided because the readout deviceis to indicate in the decimal system of notation. Should some othersystem of notation be employed a different number of teeth 219 or adifferent ratio between the idlers and the drums or both would be used.The present device provides the ten stopping positions for the drummembers 206 with five teeth 219 on each of the idlers 205 and a two toone ratio between the drum members and the idlers` The signalcontrolling the indication of a count is carried through a binary todecimal conversion circuit shown in FiGS. Vil and VIII, in which `a setof nine brushes mounted on the support member 216` cooperate with asingle conducting member 25() on a commutator 249 arranged in a certainpattern and carried on the drum member 206, there being a separatecircuit for each drum member 206 and its associated drive. Informationrelative to a count accumulated in a binary system electronic counter 34is transmitted through a series of leads A1, A2; El, B2; C1, C2; and Dl,D2 that connect four stages, hereinafter referred to as stages A, B, C,and D, of the electronic counter to the conducting member. A set of ninebrushes 252 to 269, one for each of the leads Ai, A2, Bl, B2, etc., andone for an output lead 247 going to a latch activating circuit amplifier13), are provided. A commutator member 249 mounted in or on therotatable drum member 296 is provided with a conducting surface 25d andinsulated surfaces The commutator 249 may be mounted in `any desiredmanner as long as it rotates in synchronism with said rotary drum 266.The series of brushes 252 to 213i) are mounted in a slot 261 of therockable support member 226 and are arranged to cooperate with thecommutator 249. The output brush 252, always contacting the conductingsurface 256, is connected to the output lead 247. The bnushes 252 to 26uare connected two to each stage of the counter 246. In the particulararrangement the connections are:

9 e brush 253-lead C-2 of stage C; brush 25d-lead A-2 of stage A; brushZ55-lead B-1 of stage B; brush 256- lead C-1 of stage C; brush 257-leadA-l of stage A; brush 25g-lead D2 of stage D; brush 259-lead E-Z ofstage B; and brush 260-lead D-1 of stage D.

The following tables show the counter condition and the voltage fed tothe amplifier for each digit to be indicated (state of the counter) andeach relative position of the commutator and brushes. In each of thetables the first column indicates the number registered in theelectronic counter; in Table I the secon-d to fifth columns inclusiveindicate which of the leads A-1 or A-2, B-1 or B-2, C-1 or C-2, D-1 orD-2 is energized, Le., is positive with respect to the other. Thecommutator in each position connects four of the eight leads, one fromeach pair, to the amplifier. The resulting voltage, depending upon thenumber of connected and energized leads, varies from four units (whenall the connected leads `are energized) to zero units (when none areenergized). The intermediate voltage levels are one unit, two units, andthree units depending upon whether one, two, or three of the connectedleads are positive. The control may be arranged to operate when all theconnected leads are positive or all negative.

These Voltage levels are indicated in columns 2 to 1l inclusive of TableII for each position of the commutator for each number that may beregistered in the counter. It should be noted that the voltage levelrises and fails by unit steps land reaches four units (to stop theindicator) only once in each revolution.

TABLE II Voltage to Amplier in Units at Each Coinrnutator Number inPosition Counter 4 3 2 3 2 l 2 3 2 3 3 2 3 4 3 2 3 2 1 2 3 2 1 2 l 2 3 43 2 2 1 2 2 3 4 3 2 1 3 2 1 2 3 2 l 2 3 4 2 1 2 3 4 3 2 1 2 3 2 1 0 1 23 2 3 4 3 1 0 1 2 3 4 3 2 3 2 3 4 3 2 1 0 1 2 1 2 2 3 4 3 2 1 2 1 0 1The commutator 249 and the brushes 252 to 260' that are used in thecircuit controlling the indication of a count are not part of thisinvention and are described for the purpose of showing circuit meanscontrolled by a commutator for energizing the solenoid operated latchfor stopping the drum member in selected positions.

The commutator 249 is shown relative to the brushes in the position itoccupies to indicate a zero. In such a position the brushes 255, 256,257 and 260 bear on insulated portions while the remaining brushes 253,254, 253 an-d 259 bear on conducting portions which are electricallyconnected to the portion cooperating with the brush 252 which is theoutput brush connected to the lead 247.

As the commutator moves one step counterclockwise from the positionshown, the brush 258 passes from the 1-0 conducting portion to theinsulated portion while the brush 260 passes from the insulated to theconducting portions. These two brushes are connected to the fourth or Dstage of the electronic counter and ,represent a change of eight in thecount.

Proceeding clockwise in the figure (counter-clockwise movement of thecommutator relative to the brushes) to the following positions that arereached as the commutator continues to rotate counterclockwise oneiin'ds that in passing to the second position from the zero, the nineposition, that brush 257 passes from an insulated to a conductingsegment while brush 254 passes from a conducting to an insulatedportion. The same continues for the succeeding steps. In transferringfrom each step to the next, one brush of each pair passes from aninsulated to a conducting portion while the other brush of the pairpasses from a conducting to an insulated segment. In this arrangementfor any possible position of the commutator with respect to the brushesfour of the brushes bear on insulated portions of the commutator whilethe remaining four brushes bear on conducting portions. By the patternof the insulated portions in respect to the conducting portions thesecombinations are varied to correspond to the combinations of con-ductingstates in the electronic counter representing each of the digits 0 to 9inclusive. The drum members 206 are stopped in positions correspondingto such combinations of conducting states when a signal from the counterenergizes the solenoid 226. As the commutator 249 approaches a positioncorresponding to the count in the counter the voltage on the output lead247 rises stepwise from one voltage level to the next as it approachesthe final position. This arrangement avoids the production of largetransient voltages which may interfere with the operation of thecounter.

To summarize: The readout device is connected to the electronic counter246 when it is desired to ydisplay or print numerical figurescorresponding to the count accumulated in the counter in conventionaland laligned figures so that they may be easily read or printed. Whenthe display device is in operation and when the power wheels 203 areengaged by the idlers 205, the drive for the drum members 206 bearingindicia on their cylindrical surfaces is positioned as shown in FIG. VIwith the power wheels 203 continuously rotating and driving the idlers205 and the drum members 206. The directions of rotation are indicatedby arrows in FIG. VI.

The drum members 206, once started,are continually in motion until theyare stopped in positions corresponding to a count in the controllingelectronic counter 246. The drum members 206 are stopped in suchpositions in response to a signal from the counter by the action ofsolenoid operated latches 223 engaging the idlers 205 and stopping thedrum members 206 gear engaged with the idlers at one of ten possiblestopping positions.

The inertia of the stopping driven members rocks their associatedsupport members 216 -counterclockwise, as viewed in FIG. VII, out ofengagement with the sector 231 which are then instantly urged againstthe idlers 205 under the action of the springs 232. In such position,each sector 231 locks its latch 223 to accurately hold its drum member206 to align one of the ten indicia on the periphery ofthe drum inviewing position.

When a new reading is to be made, the rotary solenoid 241 is caused tobe energized momentarily rocking the shaft 239 and the bar 242 attachedthereto. The bar 242 first rocks the sector 231 clockwise unlocking thestopped drum members 206 and then rocks the support members 216 in thesame direction about the axis of the shaft 211 to bring the idlers 205into frictional engagement with the power wheels 203, whereby all ofthe: rotatable drum members 206 are simultaneously, quickly andpositively started and continue in motion until they are each againstopped and locked in indicating positions corresponding to a count inthe -corresponding section of the controlling electronic counter 34.

For a more detailed description of the construction and operation ofsuch a binary to decimal converter and a readout device reference ismade to US. Patent No. 2,759,672, issued August 2l, 1956, and entitledLMechanical Drive Numerical Display Devices.

An electronic counter of the binary type suitable for energizing thecommutator shown in FIG. VH1 is illustrated schematically in FlG. IX.Such a counter comprises four stages A, B, C and D. These stages aresubstantially identical and each comprises a bistable multivibratorcircuit that may be switched from one condition of stability to anotherand back again by a succession of input pulses.

The first stage, stage A, comprises a dual triode tube 330 having a rstplate 331 connected through a lead 332 and resistors 333 and 334 to aB-iline 335 maintained at about 150 volts positive with respect to agrounded lead 337. A cathode 336 cooperating with the plate 331 isconnected directly to a grounded lead 337. A grid 33S cooperating withthe cathode 33d and plate 331 is connected through a resistor 339 to aninput condenser 340 and also through the resistor 339 and a secondresistor- 341 to a negative return lead 342 maintained at approximately150 volts negative with respect to the grounded lead 337. The grid 338is also connected through a grid to plate resistor 343 and a plateresistor 344 to the B-I- lead 335. The resistor 343 is bypassed with asmall condenser 345. The junction between the resistors 343 and 344 isconnected directly to a plate 346 of the second half of the du-al triode330. This plate cooperates with a cathode 347 connected directly to thegrounded lead 337. A grid 348 cooperating with the cathode 347 and plate346 is connected through a grid return resistor 349 to the inputcondenser 340 and through the return resistor 341 to the negative returnlead 342. Furthermore the grid 348 is connected through a grid to plateresistor 350 to the plate resistors 333 and 334 and, through the lead332, to plate 331. The resistor 350 is bypassed with a condenser 351.

This circuit is symmetrical side for side in that the plate resistors333 and 334 cooperating with a plate 331 are identical in totalresistance value to the plate resistor 344 connected to the second plate346. Likewise the grid return circuits including the resistors 339 and349 are identical and have the common return resistor 341. The plate togrid resistors 343 and 350 are identical as well as the condensers 345and 351. 1n order to provide a visible indication of the condition ofthis circuit the lead 332 is connected through a resistor 352 and neonbulb 353 to the grounded return lead 337. The bulb 353 will glow as longas current is flowing through the plate 346 and cathode 347 which occursas long as the irst halt of the tube including the plate 331 is atcurrent cutott. Typical resistance values for the resistors 344 and thecombination 333, 334 is 40,000 ohms for each plate circuit. The plate togrid resisto-rs may be of the order of 100,000 ohms each, the grid tocommon resistors 339 and 349 may be approximately 50,000 ohms each, andthe common to negative return lead resistor 341 should be in the orderof 100,000 ohms. The condensers 340, 345 and 341 may be made of theorder of 300 micromicrofarads.

When the apparatus is rst turned on neither section of the dual triode330 is conducting current and each of the grids 333 and 348 tends toassume a potential somewhat positive with respect to the grounded lead337. Therefore each side of the triode immediately begins to conduct thecurrent thereby increasing the voltage drop through the resistors 333,334 and the resistor 344. As the plate potentials drop in response tothis current ilow the grids 33S and 348 are each driven negative therebytending to cutoff the current ow through each half of the tube. Becauseof unavoidable differences in filament heating time, tube conductivitand resistance values one grid will cutoff its current ow more rapidlythan the 1.93 other and the circuit will stabilize itself with one halfof the dual triode conducting current and the other half completelycutoff.

Suppose that the lett half of the tube, that is the plate 331, beconducting current. The potential of the lead 332 is positive withrespect to the grounded lead 337 by the voltage drop across theconducting portion of the tube. The potential of the lead A2 connectedto the plate 34d however will be much more positive because the secondhalt of the tube including the plate 346 is at current cutoff. Likewisethe grid 348 is negative with respect to its cathode 347 while the grid338 is slightly positive with respect to the cathode 33d and some gridcurrent iiows from the grid 338 to the cathode 336. The condenser 345 ischarged to slightly more than 100 volts while the condenser 351 ischarged to a voltage of the order of 2O to 40 volts. if, while the tubeis operating in this condition, a negative pulse be applied to the inputcondenser 340 so as to drive the junction between the resistors 339 and341 negative the grids 333 and 348 are both driven negative there-bycompletely cutting orf current ilo-w through both halves of the dualtriode 330. Upon the decay or passage of the pulse as the grids 338 and348 tend to become positive the grid 348 leads in this change because ofthe small voltage charge on the condenser 351 as compared to the chargeon the condenser 345. Therefore, the second half of the triode, i.e.,the plate 346 and cathode 347 will draw plate current rather than therst half including the plate 331. Plate current ilow through the secondhalf, by flowing through the resistor 344, prevents the grid 33S frombecoming suf- `iiciently positive to allow any current ilow through thefirst half of the tube. Therefore, the stage stabilizes after the pulsewith the second half conducting and the irst halt cutoff. In thiscondition voltage of the plate 331, lead 332 and the lead A-1 leading tothe commutator, is suiiiciently positive to illuminate the neon light353 and provide the positive voltage required for operation of thecommutator.

The next negative pulse supplied through the input condenser 340reverses the state of conduction of the triode 330 with the first halfincluding the plate 331 drawing current so as to extinguish the neonbulb 353, reduce the voltage on the lead A-1, and raise the voltage onthe lead A-Z. When the first half of the triode 330 starts to draw platecurrent upon the decay of the second input pulse the plate voltage andthe potential of the lead 332 drop sharply. This produces a sharpnegative voltage pulse at the grid 343 which is transmitted through alead 354 and a condenser 355 serving as the input condenser for thesecond stage B.

The second stage includes a dual triode 360 having a first plate 331connected through a lead 362 to a resistor 363 which is connecteddirectly to the B+ lead 335. A cathode 336 cooperates with the plate361. This cathode is connected directly to the grounded lead 337. A grid363 cooperating with the plate 361 and cathode 365 is connected througha resistor 369 to the input condenser 355 and to a resistor 371 which isconnected to the negative return lead 342. A plate to grid resistor 373corresponding to the resistor 343 connects the grid 368 to a plateresistor 374 and to a plate 376 of the second half of the dual triode360. The plate 376 cooperates with a cathode 377 and grid 378. Thecathode 377 is connected to the grounded lead 337 while the grid 378 isconnected through a resistor 379 to the input condenser 355 and resistor371 and through a second resistor 380 to the lead 362. and plateresistor 363 of the rst half of the dual triode 360. Condensers 375 and381 corresponding to the condensers 345 and 351 bypass the plate to gridresistors 373 and 330. The condition of conduction in this second stageis indicated by current iiow through a resistor 382 and a neon light383.

Output pulses from the second stage B of the counter are transmittedthrough a small condenser 385 to the input circuit of the third stage Cof the counter. This stage is similar to the preceding stages andincludes a dual triode 390 corresponding to the triodes 330 and 360.This stage includes the first half plate 391 that is connected through alead 392 and plate resistor 393 to the B+ lead 335. A cathode 396cooperating with a plate 391 is connected to the grounded lead 337 whilea grid 398 cooperating with the plate 391 andthe cathode 396 isconnected through a grid resistor 399 to the input condenser 385 andthrough a resistor 401 to the negative return lead 342. Likewise, thegrid 398 is connected through a grid to plate resistor 403,corresponding to the resistors 343 and 373, to a plate resistor 404connected to the B-flead 335. A condenser 405 bypasses the grid to plateresistor 403. The junction between the resistors 403 and 404 isconnected to a second plate 406of the triode which cooperates with acathode 407 and grid 408. The grid 408 is connected through `the gridresistor 409 to the input condenser 385 and the resistor 401 connectedto the negative return lead 342. The grid 488 is also connected througha grid to plate resistor 410 to the plate resistor 393 ofthe first halfof the dual triode. A condenser 411 is connected in parallel with thegrid to plate resistor 410. The state of conduction of this stage isindicated by current flow through a resistor 412 and neon lamp 413.Output pulses from stage C are taken from the grid connection betweenthe resistors 409 and 410 through a lead 414 and output condenser 415.

The fourth stage D is similar to the others and includes a dual triode420 having a first plate 421 that is connected through a lead 422 toseries plate resistors 423 and 424 the latter being connected to the B+lead 335. A cathode 426 cooperating with a plate 421 is connecteddirectly to the grounded lead 337. A grid 428 cooperating with thecathode 426 is connected through a grid resistor 429 to the inputcondenser 415 and a return resistor 431 connected to the negative returnlead 342. The grid 428 is also connected through a grid to plateresistor 433 and plate resistor 434 to the B+ lead 335. The resistor 433is bypassed by a condenser 435. A plate 436 of the second half of thedual triode 420 is connected to the junction between the resistors 433and 434. This plate 436 cooperates with a cathode 437 and a grid 438.The grid 438 is connected to the input condenser 415 by a grid resistor439 and is connected to the plate 421 through a resistor 440 andparallel connected condenser 441. The resistors and coudensers aresimilar to those used in the preceding stages and the state ofconduction of this stage is indicated by current iiow through a resistor442 and neon bulb 443.

If nothing more were added to the circuit the first stage A wouldreverse its state of conduction at every pulse, the second stage B wouldreverse its state of conduction at every second pulse. Likewise, thethird stage C would reverse on every fourth pulse while the last stage Dwould reverse on every eighth pulse. Thus, for four stages sixteenpulses complete the sequence and leave the states of conduction inexactly the same condition as at the start of the sequence. In orderthat the counter may be used in a decimal system in conjunction withother decades, that is, give an output pulse for every tenth input pulseand reset to zero on each tenth impulse certain cross con nections areemployed. rIhus a junction between the plate resistors 333 and 334 ofstage A is connected through a lead 444 and condenser 445 to the grid'438 of the fourth stage. The condenser 445 is preferably made about thecapacity of the condensers 345, 351, 375, 385, etc. This circuit throughthe condenser 445 supplies a small negative pulse each time the firststage A transfers conduction from its second half to its first half,i.e., when it transfers from an" even count to an odd count. During thefirst eight counts assuming that the counter was initially in thecondition with each of the left halves of the tubes conducting thenegative pulses applied to the condenser 445 have no effect because thegrid 438 is already negative because of the current fiow through theiirst half of the tube 420 and the plate resistors 423 and 424.Following the eighth pulse when stages A, B and C return to theiroriginal condition stage D is left with the second half conducting,i.e., with current iiow through the plate 436 and cathode 437. Underthis condition grid 438 is slightly positive with respect to itscathode. The ninth pulse applied to the input condenser 340 causes thefirst stage A to reverse its condition. The tenth pulse applied to theinput condenser 340 again reverses the first stage A and in so doingcauses the application of a negative pulse through the lead 444condenser 445 to momentarily drive the grid 438 negative with respect toits cathode 437. As the grid 438 is driven negative and cuts ott currentflow through the plate 436, an amplified impulse appears at the junctionbetween the resistors 433 and 434 in a positive direction tending toallow the first half of the tube 420 to Idraw current. As this currentflow increases the grid 438 is driven further negative as in an ordinarytransfer to provide an `output pulse on lead 446 connected to asucceeding decade. Thus stage D is returned to its original position onthe first even pulse applied to the input condenser 340 of stage Afollowing the eight previous pulses. The tenth pulse simul taneouslywith operating stage D also applied a negative impulse through inputcondenser 355 to the second stage B to cause it to transfer to itssecond half conducting condi-tion. This stage is reset to its originalcondition by current flow through a lead 447 connected to the junctionbetween the plate resistors-423 and 424 of stage D and a condenser 448connected directly to the grid 378 of stage B. The condenser 448 ispreferably half the capacity of the condensers 381 or 385 and serves todrive the grid 378 negative during the stabilization of stage Bfollowing the input pulse through condenser 355 so that stage B insteadof remaining in its second condition with the second half conductingreturns immediately to its first condition with the plate 361 conductingcurrent. Thus, the four stages return to zero indication.

It may be desirable to reset the counter prior to any particular event.This resetting may be easily accomplished either by opening the cathodecircuit to the second half of each of the stages, that is, the circuitto the cathodes 347, 377, `407, and 437, or by simultaneously applying ashort negative pulse to the grids 348, 378, 408 and 438. While theresetting impulse should vbe of short duration it must nevertheless besomewhat longer than the impulses transmitted through the inputcondensers 340, 355, 385 and 415, of each of the stages.

When this counter decade is in a condition to indicate zero all of theneon bulbs 353, 383, `413 and 443 are eX- tinguished thus indicatingthat leads A-2, B-2, C-2, and D2 are at their maximum positivepotentials. In this event when the commutator arrives at a positionwhere it connects these four leads together a maximum positivepoten-tial is applied to the grid of the amplier tube 130 so as toenergize the latch solenoid 226 and stop the drum 206. Other counts areindicated by corresponding combinations of voltages on the leads A-1,A-2, B-1, B-2, etc., as hereinbefore discussed.

Referring now to FIG. X, there is illustrated a schematic diagramembodying the features and teachings of this invention. In particularthere are shown, schematically, the circuits which may be used for thegated amplifier 16, the Flip-Flop 20, the AND logic circuit 50, the NOTlogic circuit 60, the `OR logic circuit 28, and the check relay 32. T heoutput circuit combination that is represented schematically in FIG. Xis shown in block diagram form in FIG. IV.

The gated amplifier 16 comprises a three electrode electronic devicehaving a pair of load circuit electrodes, an anode 101 and a cathode102, and a control electrode or grid 103. The anode 101 is connectedthrough an anode load resistor R11 to a first supply source 1B-{-. Thecathode 102 is connected through the system or chassis ground.

The control or grid electrode 103 is connected through resistors R16 andR15 to a source of high bias voltage V2 which has a rather low currentoutput. The junction of the resistors R and R16 is connected through aswitch SW1 to a. second bias source V1 which has a lower voltage thanthe rst bias supply V2 but a much stronger current output. The grid orcontrol electrode 103 is also coupled through a coupling capacitor C11to the output of the scanner 12 or the multiplier 14 depending uponwhether or not the multiplier is deleted from the circuit ashereinbefore described.

The Flip Flop comprises a pair of three electrode electronic devices 110and 120 which may be two halves of a dual triode as shown. Theelectronic device 110 has a pair of load electrodes, the anode 111 andcathode 112, and a control or grid electrode 113. The electronic device120 has two load electrodes, an anode 121 and a cathode 122, and a gridor control electrode 123. The load electrodes 111, 112 and 121, 122 ofthe electrode devices 110 and 120 are respectively connected throughanode load resist-ances R20 and R21 to a floating supply voltage 2B+from one side and through a common cathode resistor R to the floatingground 2B- on the other side. The junction of the anode 111 and theresistor R20 is connected through a voltage divider comprising resist--ances R26 and R27 to the oating ground 2B-. The junction of the voltagedivider resistors R25 and R27 is connected to the grid or controlelectrode 123 of the electronic device 120. The junction of the anode121 and the resistor R21 is connected through a first voltage dividingnetwork comprising the resistors R22, R23, and R24, to the floatingground 2B-. The junction of the anode 121 and the resistor R21 is alsoconnected through a second voltage divider comprising resistors R23 andR29 to the floating ground 2B-. The output of the Flip Flop 20 is fromthe junction of the resistors R23 and R29 through a gas tube device NE1.

The grid or control electrodes 113 and 123 are also respectivelycross-connected to the anodes 121 and 111 through the feed backcapacitors C15 .and C19. The grid or control electrodes 113 and 123 arealso connected to the oating ground 2B- through the grid loadingcapacitors C17 .and C20 respectively. The output of the gated ampliiier16 is coupled through a coupling capacitor C18, the rectifier CR10 inthe reverse direction, and the input capacitor C16 to the grid orcontrol electrode 113 of the electronic device 110. The resistors R30,R31, R32 and R33 in combination with the rectifier CR10 form a clippingcircuit to clip a portion of the signal from the gated amplifier 16 tothe input capacitor C16 of the Flip Flop 20. The resistors R32 and R33are connected in series between the Hoa-ting ground 2B- and the floatingsupply 2B-j. The resistor R30, the rectifier (2R10, and the resistor R31are connected in series between the oating ground 2B- -and junction ofthe resistors R32 and R33. The operation of this clipping circuit willbe described hereinafter. A reset capacitor C12 and its chargingresistor R17 are connected in series between the fioating ZB-lsupply andthe floating 2B ground. Th-e junction of the reset capacitor C12 and theresistor R17 is connected through a switch SW2 to the junction of theresistors R23 and R24.

On the left side of the lower half of the schematic FIG. X is shown onemethod for deriving the iioating power supply, designated hereinbeforeas 213-1- and 2B-. A power supply 2B| is connected across a voltagedividing network comprising a resistor R1, an adjustable tapped resistorR13 and a resistor R2 which is connected to the chassis or systemground. The tap of the voltage dividing network supplies the ZB-jvoltageand the tap of the adjustable resistor R13 supplies the 2B- lloatingground voltage. This 2B* oating ground voltage is supplied to the latchactivating circuits and the AND logic circuit 50, to be hereinafterdescribed, through the normally closed switch SW3. A resistor RS `and acapacitor C2 are also c-onnected in series between the ZB-lsupply andthe chassis Ior system ground. The junction of the resistor R3 and thecapacitor C2 is connected to the side of the switch SW3 opposite thatwhich is connected to `the tap on the resistor R13. Therefore, while theswitch SW3 is closed the junction of the resistor R8 and the capacitorC2 supplies the 2B- iioating ground voltage as hereinbefore described.

Since the latch activating circuits are identical in connection andoperation only one of them will be described. The latch activatingcircuit 130 comprises a three electrode electronic device having twoload electrodes 131 and 132, anode and cathode, and a grid or controlelectrode 133. The activating coil of its associated latch solenoid, theanode electrode 131, the cathode electrode 132 and a cathode resistorR3, are connected in series circuit relationship between the iioating2B| supply and the iloating 2B- ground. The bypass capacitor C4 isconnected in parallel with the cathode resistor R3.

The AND logic circuit 50 comprises the rectiers CRI, CRZ, CR3 and CR4, avoltage dropping resistor R10 and an output resistor R9. The voltagedropping resistor R10 is connected from the iioating ZB-isupply througheach of the rectiiiers CR1, CRZ, CRS and CR4 through its respectiveassociated low impedance cathode resistor path R3, R4, R5 Aand R6 to theoating 2B- ground. When none of the latch activating circuits areconducting the cathode resistors provide low impedance paths for thecurrent to iiow from the lioating 2B+ supply to the floating 2B- ground.When all of the latch activating electronic devices are conducting thecurrent flow through the associ-ated cathode resistors causes a voltagedrop across each cathode resistor to block its associated CR rectifierand thus Ablock the low impedance path that was hereinbefore presented.As long as at least one of the latch activating electronic devices isnot conducting the low impedance path thereby presented presents anoutput to the output resistor R9 of the AND logic circuit 50. Therefore,when all of the latch activating circuits are conducting an outputappears on the resistor R9.

The NOT logic circuit 60 comprises a three electrode electronic devicehaving a pair of load circuit electrodes, anode 171 and cathode 172, anda grid or control electrode 173. The anode 171 is connected through ananode load resistor R7 to the floating 2B| supply. A voltage dividercomprising the resistors R18 and R19 is connected between the 21S--supply and the 2B floating ground. The cathode 172 is connected to thejunction of the resistors R18 and R19. The grid or control electrode 173is connected to the output of the AND logic circuit 50 through theresistor R9. The output of the NOT logic circuit 60 is taken through atwo electrode gas tube NEZ.

The OR logic circuit 28 comprises a three electrode electronic device180 having a pair of load electrodes, anode 181 and cathode 182 and agrid or control electrode 103. The anode 181 is connected to theZB-loating supply. The cathode 182 is connected through an activatingcoil of the check relay 32 to the floating 2B- ground. The grid orcontrol electrode 183 is connected to the output of the NOT logiccircuit 60 from the gas iilled tube NE2 and is also connected through aresistor R12 to the output of tthe Flip Flop 20 through the gas filledtube NE1. The grid or -control electrode 183 is connected through theresistor R12 and a time delay capacitor CS to the floating ZB- ground. Adischarge resistor R14 is connected in parallel with the time delaycapacitor C8.

The operation of the circuit and apparatus of FIG. X is as follows.Assume that the electronic device of the Fiip Flop circuit 20 isconducting through its load electrodes 111 and 112. Therefore, the grid123 of the electronic device or tube is kept at a potential close to the2B- ground and the tube 120 is not conducting. Therefore, the potentialon the anode or plate 121 of the tube 120 is close to the potential ofthe floating 2B+ supply and has a voltage sufficiently high to ignite orfire the gas tube NEI and supply an output to the grid or controlelectrode 183 of the tube 180 of the OR logic circuit 28.

Assume also that all of the latch activating circuits are not conductingthereby furnishing low impedance paths through the rectifiers CR1through CR4 of the AND logic circuit 50 and their associated cathoderesistances to ground. If at least one of the latch activated tubes isnot conducting there will be no output through the resistor R9 to thegrid or control electrode of the tube 170 of the NOT logic circuit 60.Therefore, the tube 170 will not be conducting and the potential of theanode or plate electrode 171 will be sufficiently high to ignite or firethe gas tube NEZ and supply an output to the grid or control electrode183 of the tube 180 of the OR logic circuit 28. The tube 180 of the ORlogic circuit 28 will conduct through its anode 181 and cathode 182circuit and hold the check relay 32 energized as long as there is anoutput from either the NOT logic circuit 60 or the Flip Flop or Bistablecircuit 20.

Assume now that an item is placed upon the Weight sensing device 11causing the scanner 12 to generate a series of pulses to the multiplier14. At least one of the pulses from the multiplier 14, probably thefirst one, will be passed through the coupling capacitor C1 and appliedto the grid or control electrode 103 of the tube 100 of the gatedamplifier 16. Prior to placing the item on the weight sensing device 11the switch SW1 was open. This biased the grid or control electrode 103through the high voltage bias source V2 through the resistors R15 andR16 to stop conduction in the tube 100. Upon placing the item on theweight sensing device 11 the gating switch SW1 which is operativelylinked to the weight sensing device 11 is closed. This places a lowervoltage bias on the grid or control electrode 103 of the tube 100 sothat a negative pulse fed through the capacitor C1 from the scanner willbe sufiicient to start the tube 100 conducting. The pulse through thecoupling capacitor C1 must have a negative amplitude that is somewherebetween the positive amplitudes of the bias voltages V1 and V2. Thus,the amplifier 16 is gated only in response to the closing of the gatingswitch SW1. This adds an additional feature of reliability to the systemsince no false signals are allowed through the amplifier 16 before anactual weighing operation.

When the tube 100 starts conducting the potential of the anode electrode101 is lowered suddenly toward system or chassis ground causing anegative pulse to be passed through the coupling capacitor C18 to theinput of the Flip Flop 20. The combination of the resistors R33 and R32,of the clipping circuit hereinbefore described, provides a voltagedivider which biases the junction of the resistors R32 and R33 at someintermediate level between the floating 2B+ supply and the floating 2Bground. This applies a positive reverse bias through the resistor R31 onthe input rectifier CR10. Therefore, When the negative pulse is passedby the capacitor C18 a first predetermined magnitude of said pulse isclipped by the positive reverse bias on the rectifier CR10. This allowsthe Flip Flop 20 to take advantage of the high signal to noise ratio ofthe input signal. The capacitors C17 and C20 that connect each of thegrid or control electrodes 113 and 123, respectively, to the floating2B- ground are so connected to decrease the sensitivity of the Flip Flop20 also taking advantage of the good signal to noise ratiocharacteristics of the input signal. By capacitively loading the grids,the sensitivity can be altered Without altering the direct-currentcharacteristics of the Flip Flop 20. Further, the combined effect of thetwo pairs of capacitors C15, C17 and C19, C20 tends to wash away anystray capacitance effects in the Flip Flop 20.

The input signal from the gating amplifier 16 is thus passed through therectifier CR in a reverse direction and the capacitor C16 to the grid113 of the tube 110. The negative input signal to the grid 113 tends tostop the tube from conducting. If the tube 110 starts to ceaseconduction the potential of its plate 111 rises which gives a positivesignal through the capacitor C19 to the grid 123 of the tube 120 whichtends to start the tube 120 conducting. As the tube starts to conductthe potential on its plate 121 starts falling, which. is passed throughthe capacitor C15 to the grid 113 of the tube 110 which further adds tothe input signal which is causing the conduction of 110 to cease. Thetwo just described effects combine to make the Flip Flop 20 sn-ap fromone state of conduction to the other. When the tube 120 is fullyconducting, the potential on the plate 121 is lowered below theextinguishing voltage of the gas filled tube NEl, advantageously a neontube, and therefore the signal will be removed from the OR logic circuit28.

Referring now to the operation of the latch activating circuits it canbe seen that when a rotary indicia bearing Wheel of FIG. VI is properlypositioned, the commutator 249 of the binary to decimal converter willalso be properly positioned with respect to the associated controllingcounter as hereinbefore described. Therefore there is an output from theoutput brush 247 from the commutator 249 which is fed to the associatedlatch activating circuit. Assume that this latch activating circuitembodies the electronic tube 130. As is shown in FIG. X the input fromthe binary to decimal converter, i.e., the input from brush 247, is fedto the grid 133 of the tube 130. This drives the tube to conduction inthe load electrode circuits 131 and 132 which pulls in its latchsolenoid and stops the rotation of the indicia bearing rotary member ornumber wheel and its associated binary to decimal commutator. Becausefast operation of this latch solenoid is necessary requiring full tubeconduction, the cathode resistor R3 is effectively bypassed for a firstpredetermined length of time by the capacitor C4. Current ow in the tube130 causes a voltage drop across the resistor R3 which blocks the lowimpedance path through the rectifier CR1 that was previously availableto the AND logic circuit 50.

When all of the plurality of tube sections are conducting, correspondingto the number of readout devices that are properly positioned, the ANDlogic circuit 50 will have an output through the resistor R9 to the NOTlogic circuit 60. That is, the output of the AND logic circuit 50 isapplied to the grid or control electrode 173 of the tube which causesthe tube 170 to conduct. The potential on the plate 171 drops toward thepotential of the floating 2B ground and the gas filled tube,advantageously a neon tube, N152 is extinguished and a second input tothe OR logic circuit 28 is removed. The gas filled tubes N131 and NE2 onthe outputs of the Flip Flop circuit 20 and the NOT logic circuit 60 areadvantageously used since when the output voltage of the Flip Flop 20 orthe NOT logic circuit 60 goes below the eX- tinguishing voltage of thegas filled tubes the tubes will extinguish and the output will be zeropotential rather than what is actually the particular plate potential atthe time. Since both inputs are removed from the OR logic circuit 28,that is, the grid or control electrode 183, the tube will cease to haveconduction in the anode ISI- cathode 182 circuit and the activating coilof the check relay 32 will be deenergized allowing the check relay todrop out. The dropping out of the check relay 32 furnishes the operativeoutput signal condition which may be utilized to initiate a succeedingcycle whether it be a readout sequence, a printing cycle, or othersequence or cycle.

The advantages of obtaining the sampling signal for the AND logiccircuit 50 from the cathodes of the latch activating circuits ratherthan from the anodes where a larger signal is available should be noted.Due to the nature of the use of the latch solenoid, very fast drop outtime is requisite. This dictates that the residual current l@ throughthe latch solenoid coil should be very small, preferably none at all.Semi-conductor diodes for use in the AND logic circuit Si) are availablehaving a back resistance in the nature of 5 or 106 ohms at a relativelylow price. Furthermore, the magnitude of this back resistance maydecrease with time and temperature. To use these diodes in the plate oranode circuit is not practical when these tolerances and conditions areaccounted for and would prove very unreliable. By obtaining the signalfrom the. cathode circuit, the operation of the latch solenoid is notaffected. Furthermore, it can be shown that the reverse to forwardconduction ratio necessary to obtain a full step for the conditionwhere, for example, several of the latch solenoids are energized andthen the last one operated, is not at all critical and is greatlyexceeded by the inexpensive diode above. This is made possible by thevery low impedance signal available from the latch activating circuit.Thus, in the embodiment shown it is possible to use diodes that are lessexpensive.

After the printing cycle or other readout sequence is completed thelatch activating circuits will be deenergized by opening the normallyclosed switch SWE, thus removing the connection from the floating ZB-ground. Because the latch activating circuits and the Flip Flop circuithave been operating above system or chassis ground by the value of thefloating 2B- ground, the opening of the switch SW3 causes the potentialat the junction of R8 and C2 to change to the potential of 2B]-. Thesignal from the gated amplier 16, which operates at system or chassisground, is R-C coupled to the Flip Flop with a time constant whichdifferentiates this signal. Since an abrupt change in the floatingground level from 2B- to the value of 21B-lwould appear in series withthe signal to the Flip Flop 20, therefore appearing as a signal to itthe capacitor C2 is utilized. The capacitor C2 is connected between thechassis ground and the 2B- floating ground so that the rate of changefrom floating ZB- ground to the oating ZB-lsupply, or vice versa, isslow enough that the time constant of the differentiating network willnot pass it.

The Flip Flop 2@ may be reset at the end of a print cycle by closing theswitch SW2. This allows the capacitor C12 to discharge through theresistor R24 which applies positive signal to the grid 113 of the tube110. This starts the tube 110 toward conduction and by reversal of thefeedback effects described above the Flip Flop 20 snaps back to itsoriginal conduction state.

The capacitor CS connected between the floating 2B- ground and thecontrol electrode 13 of the tube 186 of the OR logic circuit 28functions as a time delay for two conditions. Assume that there had justrbeen a zero weight condition which actuated the latch actuatingcircuits but did not produce an ON output condition in the Flip Flopcircuit 20 since there were no pulses generated by lthe conditionresponsive device It). Assume next that the check circuit is reset andan item of some definite weight is placed on the condition responsivedevice 10. Then the capacitor C8 will hold the Flip Flop output signalon the OR logic circuit 2S, that is, to the grid or control electrode183 of the tube 180, unti-l the RC circuits comprising the bypasscapacitors and the cathode resistors, of the latch activating circuitshave had sufficient time to discharge. If the capacitor C8 were notthere it would be possible to obtain a checking condition from a checkrelay 32 under the above described circumstances. The capacitor C8 ischarged from the plate or anode 171 of the NOT logic circuit 6@ throughthe gas filled tube NE2 and will discharge when the gas tube NEZ isextinguished. Under a second condition, if one wheel or rotary drummember 296 of the readout device 33 is still rotating the charge on thecapacitor C will hold the tube 180 `of the OR logic circuit 28conducting until the last binary to decimal commutator reaches its newposition of four energized segment brushes on the conducting surface 250of the commutator 249.

In the foregoing description there is disclosed a check circuit whichinsures that at least one pulse has passed from the condition responsivedevice through a preamp, Shaper or other elements in the multiplierchain, and that all of the indicia bearing rotary drum members of thereadout device have been positioned properly with respect to the stateof the corresponding counter or computer which controls the rotary drummember. Failure of the scanner projection lamp or any tube from thepreamp to the last multiplier stage that Would eliminate the signal and,with no protection, initiate a .print cycle with no computationsavailable is then provided for. The failure of an indicia bearingreadout wheel to position on indicia corresponding to the .state of thecontrolling decade counter prevents the initiation of :a printing cycleor readout secuence. The failure of an indicia bearing rotary member tolock up and thereby be misre'gistered also prevents the initiation -of areadout sequence or printing cycle. The `failure of an indicia bearingrotary drum member to stop rotating which might be caused by la latchactivating circuit failure, a broken lead, or other cause again preventsthe initiation of the print cycle or readout sequence.

Referring now to FIGS. XI through XV, there yis shown a secondembodiment of the readout device 38. The second embodiment includes asensing device which, in response to the dropout of the check relay v32,mechanically checlcs to see whether or not the readout device isfunctioning properly before the operation of a succeeding cycle, eg., aprint cycle, is initiated. The binary to decimal converter 35 shown inFIGS. VII and VIII also is used with the second embodiment of thereadout device.

The electro-mechanical combination of the binary to decimal converter 36and the second embodiment of the readout device is constructed on aframe 501 having upstanding end members 502, the frame 501 havin-g yaflat bottomed U-shape as viewed from the front (FIG. XV). The completedevice comprises a plurality of duplicate subassemblies, one for eachplace in the number to be indicated. The several subassemblies, one ofwhich is shown in FIG. XI, are driven by a series of rubber-tired powerwheels 503 mounted on a power shaft 504 journaled in bearings in theupstanding end frame members 502. The power wheels 503 are continuouslyrotated when the readout device is in operation and, when engaged,frictionally drive a plurality of intermediate drive wheels or idlers505. Each of the idlers 505 has a gear 5% meshed with a gear 507 on agenerally cup-shaped hollow drum member S08 bearing indicia on itscylindrical surface, there being a drum member vfor each idler, thetotal number depending on .the places in the number to be indicated. Theindicia are like those shown in FIG. V and are visible through windowslike those shown in FIG. V. A second gear 509 (FIG. XIII) on each of thedrum members 50S `is used to set up type wheels (not shown)corresponding to the indicia displayed through the windows.

Each of the drum members 508 is mounted for rotation on a hub 510 whichin turn is mounted for rotation on a stationary shaft 511 supported bythe end frame members 592. Each of the idlers S05 is rotatably mountedon a pin 512 fixed to a support member 513 which, vbecause each of thesupport -members 513 is mounted on one of the hubs 510, is rockablymounted on the stationary shaft S11. Thus, there is a rockable supportmember 513 carrying an idler 505 together with an associated drum member508 for each place in the number to Ibe indicated. The rockable supportmembers 513 and the drum members 508 have a common pivotal axis definedby the axis of the stationary shaft 511. A cla-mp 514, in the form of asplit tube, on the right hand end of the `stationary shaft 511 as viewedlin FIG. XIII, locates the right hand one of the rockable supportmembers 513, thehub 510 of such support member contacting such clamp514. The next one of the hubs S10 is located on the stationary shaft 511in contact with the gear 569 to its immediate right, the subassemblies`being stacked on

1. IN COMBINATION, A CONDITION RESPONSIVE SYSTEM ADAPTED TO GENERATE ANENCODED ELECTRICAL SIGNAL WHICH IS A FUNCTION OF A CONDITION BEINGMEASURED, TRANSLATING MEANS FOR DECODING THE SIGNAL AND INCLUDING APLURALITY OF MOVABLE MEMBERS AND LATCH MEANS FOR LATCHING THE MEMBERS INREAD OUT POSITIONS, AND CIRCUIT MEANS RESPONSIVE TO ELECTRICAL OPERATIONOF THE SYSTEM AND TO THE POSITION OF THE MOVABLE MEMBERS BEING INCOINCIDENCE WITH SAID SIGNAL FOR GENERATING AN OUTPUT SIGNAL, THETRANSLATING MEANS FURTHER INCLUDING MEANS RESPONSIVE TO THE OUTPUTSIGNAL FOR MECHANICALLY SENSING THE LATCH MEANS AND INITIATING ASUCCEEDING CYCLE PROVIDED ALL THE MEMBERS ARE CORRECTLY LATCHED IN THEIRREAD OUT POSITIONS.